• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    It is proposed an interface circuit (1) for an operating device (2) of the household appliance technology, in particular for a control device for lighting means (3), for bidirectional communication with a bus (4) via a respective transmitting optocoupler (9) and a receiving optocoupler (8), wherein a node (P) of the interface circuit (1) with a drive voltage (VT) can be acted upon such that the transmission optocoupler (9) turns on and thus sends a signal to the bus (4), and wherein at the same Node (P), the state of the receiving optocoupler (8) is detectable, so that a signal from the bus (4) can be received.
    公开号:AT15471U1
    申请号:TGM9022/2013U
    申请日:2013-12-20
    公开日:2017-09-15
    发明作者:Vonach Christoph
    申请人:Tridonic Gmbh & Co Kg；
    IPC主号:
    专利说明:

    description
    INTERFACE SWITCHING FOR SIGNAL TRANSMISSION
    The present invention relates to interfaces that can be used, for example. In connection with operating devices for operating bulbs such as. Ballasts. In particular, the invention relates to an interface circuit for transmitting data, in particular control commands to a control device for the lighting means.
    Interface circuits for bidirectional transmission of data between a control device for lighting and a bus are basically known. Such an interface is known for example from US 6,762,570 B1. In Fig. 4, a circuit is shown in this document with two optocouplers for transmitting and receiving data. The bidirectional transmission is controlled by a microcontroller 102, this microcontroller having ports for receiving data on the one hand and separate ports for transmitting data on the other hand. The intelligent circuit in the form of the microcontroller occupies several pins for bidirectional communication in the operating device.
    Accordingly, the invention has set itself the goal of creating a simplified interface circuit.
    The object of the invention is solved by the features of claim 1. Advantageous embodiments and modifications of the invention will become apparent from the dependent claims. A first aspect of the invention relates to an interface circuit for an operating device of domestic appliance technology, in particular for a control device for lighting means, for bidirectional communication with a bus via in each case a transmitting optocoupler and a receiving optocoupler. A node of the interface circuit can be acted upon by a drive voltage in such a way that the transmitting optocoupler switches through and thus transmits a signal to the bus. At the same node, the state of the receiving optocoupler is detectable, so that a signal can be received from the bus.
    Another aspect of the invention relates to an operating device for lamps having such an interface circuit.
    Another aspect of the invention relates to a control and evaluation circuit for an interface circuit for an operating device of domestic appliance technology, in particular for a control device for lighting, for bidirectional communication with a bus via a respective transmitting optocoupler and a receiving optocoupler. A node of the control and evaluation circuit can be acted upon by a drive voltage such that the transmitting optocoupler switches on and thus sends a signal to the bus. At the same node, the state of the receiving optocoupler is detectable, so that a signal can be received from the bus. In this case, the control and evaluation circuit can be designed as an integrated circuit, in particular ASIC or microcontroller or a hybrid version thereof.
    By turning on the transmission optocoupler, a signal, in particular a digital signal, is sent to the bus. By being able to detect the state of the receiving optocoupler, it is possible to receive the state of the bus and thus a signal from the bus.
    The node may be a connection of a control and evaluation circuit.
    The control and evaluation circuit may include a driver for applying a drive voltage at the node, wherein the driver voltage causes a turn-on of the transmission optocoupler.
    The control and evaluation circuit may comprise means, e.g. a comparator for comparing the voltage at the node with a reference voltage. Depending on this comparison, a low level or high level signal on the bus may be inferred.
    If the voltage at the node is greater than the reference voltage, a low level signal on the bus can be deduced. If the voltage at the node is less than the reference voltage, a high level signal on the bus can be deduced. The data transmitted over the interface can be transmitted both as an active high signal (i.e., a 1 is transmitted through a high level) and as an active low signal (i.e., a 1 is transmitted through a low level).
    The bus can be configured as a DALI bus. A detected high level signal of the bus can be interpreted as a sleep state of the bus.
    The control and evaluation circuit can be designed as an integrated circuit, preferably in the form of a microcontroller, an application-specific integrated circuit (ASIC) or a digital signal processor.
    The interface circuit may comprise: - a at the node (P) connected first current path comprising a low-resistance circuit (R3) and the transmission optocoupler (9), [0016] - one at the node (P), with a supply voltage (V1) supplied, high-impedance second current path, which is connected to a receiving optocoupler (8).
    The receiving optocoupler may be connected to the high-impedance second current path in such a way that switching through the receiving optocoupler at the junction causes a low potential.
    The receiving optocoupler may be connected to the high-impedance second current path in such a way that a non-switching-through of the receiving optocoupler at the junction causes a high potential.
    The receiving optocoupler may be connected to the high-impedance second current path in such a way that non-switching through of the receiving optocoupler causes a non-switching-through of the transmitting optocoupler.
    The transmitting optocoupler on the one hand, the driver voltage and on the other hand be coupled to the receiving optocoupler supply voltage can be supplied.
    The interface circuit may comprise such a designed asymmetric resistance network, which turns on when supplying the drive voltage of the transmitting optocouplers and does not switch on when supplying the supply voltage of the transmitting optocouplers.
    When not applying the node with the driver voltage, preferably the transmitting optocoupler is not turned on and the control and evaluation circuit can receive the received via the receiving optocoupler digital signal depending on the voltage at the node (P) resulting voltage.
    The invention now aims at the fact that instead of two pins on the intelligent circuit - ASIC or microcontroller - only one pin for bidirectional data communication by means of two optocouplers is necessary.
    Preferred embodiments of the invention will be explained in more detail with reference to the accompanying drawings. 1 is a schematic diagram of a voltage-resistant interface circuit according to an embodiment of the present invention; Fig. 1 shows a bidirectional interface 1 according to the present invention. This interface 1 is used for bidirectional data exchange of an operating device 2 for one or at least one light source 3 with, for example, a remote center or another operating device (not shown) via a bus 4. In the interface 1 is a control circuit or control and evaluation circuit 10 is provided, which connects the interface 1 with the operating device 2 and in particular allows bidirectional communication between bus 4 and operating device 2. The operating device 2 may in particular be an electronic ballast for lighting means. The luminous means 3 may be, for example, an LED or OLED (organic light-emitting diode) illuminant or else a halogen lamp or gas discharge lamp. The operating device 2 can also generally serve for domestic appliance technology for controlling further electrical appliances.
    The interface 1 has terminals 5 for the bus 4. At the terminals 5, the input of a receiving channel or receiving branch 6 and the output of a transmission channel or transmission branch 7 are brought together. The interface 1 is able to receive data from the bus via the reception channel 6 and to send data to the bus via the transmission channel 7. The interface 1 or the operating device 2 receives data from the bus 4 via the reception channel 6, which is also referred to as the forward channel. The transmission channel 7 is the return channel, ie the channel via which the interface 1 or the operating device 2 data is transmitted to the bus 4 sends.
    The received data may in particular be control commands for the operation of the luminous means 3. The transmitted data may, for example, relate to information about the state of the luminous means 3 or of the operating device 2. The exchanged data preferably corresponds to the DALI (Digital Addressable Lighting Interface) standard, a protocol for the control of lighting control gear. Alternatively, the data may be in accordance with the DSI (Digital Signal Interface) protocol for control of operating devices. Preferably, the data on the bus 4 is in digital form.
    For example, if the bus 4 is a DALI bus as used in the field of lighting technology, a first signal level may be at a low physical level with a voltage range of -4.5V to +4.5V whereas a second signal level is at a high level with a voltage range of +9.5V to +22.5V, ie z. B. 16 V, or of -9.5 V and -22.5V can be assigned. In principle, in the case of a DALI bus system, the data transmission functions so that, in the case of a bit transmission, the voltage on the bus 4 is pulled to zero volts or at least approximately to zero volts, while in the quiescent state, ie if no bit is sent, a bus voltage in the voltage interval of 9.5 to 22.5 V, ie z. B. 16 V or between -9.5 V and - 22.5 V, is applied. In a DALI bus system, therefore, data is transmitted through a low level. Alternatively or additionally, data may also be transmitted through a high level, as is the case with the DSI protocol, for example.
    At the output of the receiving channel 6, a potential separation serving for optocoupler or receiving optocoupler 8 connects. Another optocoupler or transmitting optocoupler 9 is connected to the input of the transmission channel 7. Alternatively, the receiving optocoupler 8 and the transmitting optocoupler 9 are connected directly to the bus 4.
    The receiving optocoupler 8 and the transmitting optocoupler 9 are designed to allow a bidirectional data exchange between the control circuit 10 and the bus system and thus between the operating device 2 and the bus system. For example, therefore, the receiving optocoupler 8 may be configured to send information such as control commands, which are applied to the bus 4, to the control circuit 10 and further to the operating device 2. On the other hand, the operating device 2 in turn can output data, such as status information, to the control circuit 10, which feeds these data to the transmission channel 7 via the transmission optocoupler 9 and finally transmits it to the bus system. The control circuit 10 may be e.g. convert analog data received from the operating device 2 into digital signals such as, for example, DALI or DSI signals, and feed them to the transmission channel 7.
    The control circuit 10 is preferably designed as an integrated circuit, preferably in the form of a microcontroller, an application-specific integrated circuit (ASIC) or a digital signal processor.
    According to the invention, the control circuit has a single pin P or connection for bidirectional data communication via the reception optocoupler 8 and the transmission optocoupler 9. The reception optocoupler 8 and the transmission optocoupler 9 are only via the pin P. the control circuit 10 is connected. At the control circuit 10 thus no two separate connections for this data communication are necessary.
    The output 8a of the receive optocoupler 8, i. The output-side optical receiver of the receiving optocoupler 8, for example, designed as a transistor, is connected in series with a first resistor R1. The output 8a of the receiving optocoupler 8 is connected to ground. At the first resistor R1 is applied to a voltage V1.
    Between the pin P of the control circuit 10 and the connection point between the receiving optocoupler 8 and the first resistor R1, a second resistor R2 is connected.
    At the pin P is also a series circuit of a third resistor R3, a diode D1 and the input 9e of the transmission opto-coupler 9, i. E. the input-side optical transmitter of the transmission opto-coupler 9, connected. The third resistor R3 is connected in particular to the pin P. The cathode of the optical transmitter of the transmission opto-coupler 9, for example in the form of a light-emitting diode 9L, is connected to ground. Its anode is connected to the cathode of optional diode D1.
    The control circuit internally has a driver T and a comparator K. Comparator K compares the voltage at pin P with a reference voltage Vref. The pin P is connected to the positive, non-inverting input of the comparator K. The reference voltage Vref is applied to the negative, inverting input of the comparator K.
    The output signal of the comparator K is denoted by IN. The output of the driver T is connected to the pin P, wherein the input signal of the driver T is designated as OUT. Depending on this signal OUT, a driver voltage VT may be present at the output of the driver T. If, for example, the signal OUT is a logic high signal 'High', then the driver T at the pin P will be the positive drive voltage VT. If, on the other hand, the signal OUT is a logic low signal 'Low', the driver T will not have a voltage VT.
    According to one embodiment of the invention, the various components may have the following values: R1 = 30.R, where R is a resistance value, R2 = 30.R, [0042] R3 = R, [0043] V1 = 3.3 volts, Vref = 1.5 volts, and VT = 3.3 volts.
    The diode D1 and the light emitting diode 9L of the transmission opto-coupler 9 may each have the following forward voltages: VD1 = 0.7 volts, and [0048] V9L = 1.5 volts.
    The diode D1 is only an optional component.
    The driver T and the comparator K are preferably internal components of the control and evaluation circuit 10. Preferably, the reference voltage Vref of internal components of the control and evaluation circuit 10 is provided. The components of the interface 1, which are not internal components of the control and evaluation circuit 10, are preferably mounted on a printed circuit board.
    The mode of operation of the interface according to the invention will be explained below.
    In the idle state of the DALI bus 4, as described above, the bus level is high. Thus, the receiving opto-coupler 8 will switch through, so that in particular the second resistor R2 is pulled to ground. The ground potential is thus applied to the pin P, as a result of which the ground potential is also applied to the non-inverted input of the comparator K. The negative, however, has a positive voltage Vref, so that at the output IN of the comparator, a logic low signal, low 'results. Thus, the logic low signal 'Low' at the output IN again reflects that the bus 4 is at rest or that the bus level is high.
    In the present embodiment, the logical relationships are explained with reference to the DALI bus, that is, in the idle state, the bus level is high. In other protocols, in particular DSI, the idle state is characterized by a bus level zero, so that then result in the inverted conditions.
    The reception operation from the point of view of the interface or of the operating device will be explained below.
    For example, if the bus is transmitting in the form of a DALI bus, a negative edge, i. E. the bus potential drops from a high level to a low level. After this negative edge of the receiving optocoupler 8 is no longer turned on because of the low level, so that the ground potential is no longer applied to the pin P.
    The resistance circuit is now selected so that, starting from the voltage supply V1 now applied to the pin P voltage while a transmission mode of the LED 9L results, but the transmission power is too low to turn on the transistor 9T of the transmission optocoupler 9.
    At the same time applies now at the pin P and thus at the non-inverted input of the comparator, a signal of, for example, 2.2 volts, which at the output IN the high signal, high 'results, thus the negative edge in the example of DALI bus reflects.
    This voltage at pin P of, for example, 2.2 volts results from the forward voltage VD1 = 0.7 volts of the diode D1 and the forward voltage V9L = 1.5 volts of the light emitting diode 9L. If, according to a further embodiment, the diode D1 should not be provided, then a corresponding lower voltage of, for example, 1.5 volts would result at the pin P and thus at the non-inverting input of the comparator K. In order to obtain the high signal 'High' at the output IN in this exemplary embodiment too, the reference voltage Vref would have to be reduced below 1.5 volts.
    The transmission mode from the point of view of the interface or of the operating device will be explained below.
    As an internal component in the control circuit 10, the driver for example. 3.3 Volts is provided. If this driver is applied to the pin P and thus to the third resistor R3 3.3 volts, the current resulting from the light emitting diode 9L will be sufficiently high to turn on the transmitting optocoupler 9 and its transistor 9T.
    In the interface 1, therefore, there is such an asymmetry that the 3.3 volts from the voltage supply V1 by means of the resistor network consisting of the first and the third resistor are divided down such that the transistor 9T of the transmitting optocoupler 9 does not turn on while, on the other hand, the 3.3 volts from the internal driver T of the ASIC 10 are applied to the transmit optocoupler without such downsampling, thus resulting in a turn on of the transmit side opto-coupler 9.
    It should be noted that according to the invention on the one hand from the bus and on the other hand by an internal driver of the ASIC each a voltage to the transmitting optical coupler 9 are fed, meanwhile these voltages are supplied with an asymmetric resistance network.
    Internally, it is ensured in the ASIC that the transmission mode via the driver T is only active if there is currently no evaluation on the receiver-side comparator with the output IN.
    The said divider ratio of the asymmetrical resistance circuit is in a factor of at least 10, preferably even higher. Reference symbol: 1 Interface 2 Operating device 3 Illuminant 4 Bus 5 Terminals 6 Receiving channel 7 Transmitting channel 8 Receiving optocoupler 8a Output of the receiving optocoupler 9 Transmitting optocoupler 9e Input of the transmitting optocoupler 9L Transmitting optocoupler LED 9T Transistor 9T of the transmitting optocoupler 10 Control circuit or control and evaluation circuit
    权利要求:
    Claims (16)
    [1]
    claims
    1. Interface circuit (1) for an operating device (2) of the household appliance technology, in particular for a control device for lighting means (3), for bidirectional communication with a bus (4) via in each case a transmitting optocoupler (9) and a receiving optocoupler (8 ), wherein a node (P) of the interface circuit (1) with a drive voltage (VT) can be acted upon such that the transmission optocoupler (9) turns on and thus sends a signal on the bus (4), and wherein at the same node ( P) the state of the receiving optocoupler (8) is detectable, so that a signal from the bus (4) can be received.
    [2]
    2. Interface circuit according to claim 1, wherein the node (P) is a connection of a control and evaluation circuit (10).
    [3]
    3. Interface circuit according to one of the preceding claims, wherein the control and evaluation circuit (10) has a driver (T) for applying a drive voltage at the node (P), wherein the drive voltage causes a switching through the transmission optocoupler (9).
    [4]
    4. Interface circuit according to one of the preceding claims, wherein the control and evaluation circuit (10) comprises means, in particular a comparator (K), for comparing the voltage at the node (P) with a reference voltage (Vref), depending on this comparison a low level or high level signal on the bus (4) is closed.
    [5]
    The interface circuit according to claim 4, wherein, when the voltage at the node (P) is greater than the reference voltage (Vref), a low level signal on the bus (4) is closed, and when the voltage at the node (P) becomes smaller when the reference voltage (Vref) is closed to a high level signal on the bus (4)
    [6]
    6. Interface circuit according to claim 4 or 5, wherein the bus (4) is designed as a DALI bus and a detected high-level signal on the bus (4) is interpreted as the idle state of the bus (4).
    [7]
    7. Interface circuit according to one of the preceding claims, wherein the control and evaluation circuit (10) is designed as an integrated circuit, preferably in the form of a microcontroller, an application-specific integrated circuit (ASIC) or a digital signal processor.
    [8]
    8. Interface circuit according to one of the preceding claims, comprising: - a node (P) connected to the first current path comprising a low-impedance circuit (R3) and the transmission optocoupler (9), - one at the node (P) connected to a supply voltage ( V1) supplied, high impedance second current path, which is connected to a receiving optocoupler (8).
    [9]
    The interface circuit of claim 8, wherein the receive optocoupler (8) is connected to the high resistance second current path such that gating the receive optocoupler (8) at the node (P) causes a low potential.
    [10]
    10. An interface circuit according to claim 8 or 9, wherein the receiving optocoupler (8) is connected to the high-impedance second current path such that a non-switching of the receiving optocoupler (8) at the node (P) causes a high potential.
    [11]
    The interface circuit of claim 10, wherein the receive optocoupler (8) is connected to the high impedance second current path such that non-switching of the receive optocoupler (8) causes the transmit opto-coupler (9) to not pass through.
    [12]
    12. Interface circuit according to one of the preceding claims, wherein the transmission optocoupler (9) on the one hand, the driver voltage (VT) and on the other hand with the receiving optocoupler (8) coupled supply voltage (V1) can be fed.
    [13]
    13. An interface circuit according to claim 12, comprising an asymmetric resistor network such that when supplying the drive voltage (VT) of the transmitting optocoupler (9) turns on and not supply when supplying the supply voltage (V1) of the transmitting optocoupler (9).
    [14]
    14. Interface circuit according to one of the preceding claims, wherein, upon non-application of the node (P) with the drive voltage (VT), the transmitting optocoupler (9) does not turn on and the control and evaluation circuit (10) via the receiving optocoupler ( 8) can detect digital signal received as a function of the voltage resulting at the node (P).
    [15]
    15. Operating device for lamps having an interface circuit (1) according to one of the preceding claims.
    [16]
    16. control and evaluation circuit (10) for an interface circuit (1) for an operating device (2) of the household appliance technology, in particular for a control device for lighting means (3), for bidirectional communication with a bus (4) via a respective transmission optocoupler ( 9) and a receiving optocoupler (8), wherein a node (P) of the control and evaluation circuit (10) with a drive voltage (VT) can be acted upon such that the transmitting optocoupler (9) turns on and thus a signal to the Bus (4) transmits, and wherein at the same node (P), the state of the receiving optocoupler (8) is detectable, so that a signal from the bus (4) can be received, wherein the control and evaluation preferably as an integrated Circuit, in particular ASIC or microcontroller or a hybrid version thereof, is formed.
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    法律状态:
    2019-08-15| MM01| Lapse because of not paying annual fees|Effective date: 20181231 |
    优先权:
    申请号 | 申请日 | 专利标题
    DE102012224515.4A|DE102012224515A1|2012-12-28|2012-12-28|Interface circuit for signal transmission|
    PCT/AT2013/000210|WO2014100843A2|2012-12-28|2013-12-20|Interface circuit for signal transmission|
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